| NXP Pegoda | LPC-MT-2138 | MSP430 easyweb2 | AT91RM9200-DK |
The OCD makes it possible to access the JTAG/ICE Interface. If you want to use the Wiggler (old low-cost parallel port jtag debugger), it is important to use some configuration arguments. See below:
#
# This is for the "at91rm9200-DK" (not the EK) eval board.
#
# The two are probably very simular.... I have DK...
#
# It has atmel at91rm9200 chip.
source [find target/at91rm9200.cfg]
$_TARGETNAME configure -event gdb-attach { reset init }
$_TARGETNAME configure -event reset-init { at91rm9200_dk_init }
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash_bank cfi 0x10000000 0x00200000 2 2 0
proc at91rm9200_dk_init { } {
# Try to run at 1khz... Yea, that slow!
# Chip is really running @ 32khz
jtag_khz 8
mww 0xfffffc64 0xffffffff
## disable all clocks but system clock
mww 0xfffffc04 0xfffffffe
## disable all clocks to pioa and piob
mww 0xfffffc14 0xffffffc3
## master clock = slow cpu = slow
## (means the CPU is running at 32khz!)
mww 0xfffffc30 0
## main osc enable
mww 0xfffffc20 0x0000ff01
## program pllA
mww 0xfffffc28 0x20263e04
## program pllB
mww 0xfffffc2c 0x10483e0e
## let pll settle... sleep 100msec
sleep 100
## switch to fast clock
mww 0xfffffc30 0x202
## Sleep some - (go read)
sleep 100
#========================================
# CPU now runs at 180mhz
# SYS runs at 60mhz.
jtag_khz 40000
#========================================
## set memc for all memories
mww 0xffffff60 0x02
## program smc controller
mww 0xffffff70 0x3284
## init sdram
mww 0xffffff98 0x7fffffd0
## all banks precharge
mww 0xffffff80 0x02
## touch sdram chip to make it work
mww 0x20000000 0
## sdram controller mode register
mww 0xffffff90 0x04
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
## sdram controller mode register
## Refresh, etc....
mww 0xffffff90 0x03
mww 0x20000080 0
mww 0xffffff94 0x1f4
mww 0x20000080 0
mww 0xffffff90 0x10
mww 0x20000000 0
mww 0xffffff00 0x01
}
reset_config trst_and_srst
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME at91rm9200
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x05b0203f
}
# Never allow the following!
if { $_CPUTAPID == 0x15b0203f } {
puts "-------------------------------------------------------"
puts "- ERROR: -"
puts "- ERROR: TapID 0x15b0203f is wrong for at91rm9200 -"
puts "- ERROR: The chip/board has a JTAG select pin/jumper -"
puts "- ERROR: -"
puts "- ERROR: In one position (0x05b0203f) it selects the -"
puts "- ERROR: ARM CPU, in the other position (0x1b0203f) -"
puts "- ERROR: it selects boundry-scan not the ARM -"
puts "- ERROR: -"
puts "-------------------------------------------------------"
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
# Create the GDB Target.
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
# AT91RM9200 has a 16K block of sram @ 0x0020.0000
$_TARGETNAME configure -work-area-virt 0x00200000 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 1
# This chip has a DCC ... use it
arm7_9 dcc_downloads enable
telnet_port 4444 gdb_port 2001 interface parport parport_port /dev/parport0 parport_cable wiggler jtag_speed 0
/*
* Rick Bronson <rick@efn.org>
*
* Configuration settings for the AT91RM9200DK board.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/* ARM asynchronous clock */
#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
#define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define USE_920T_MMU 1
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
/* flash */
#define CONFIG_SYS_MC_PUIA_VAL 0x00000000
#define CONFIG_SYS_MC_PUP_VAL 0x00000000
#define CONFIG_SYS_MC_PUER_VAL 0x00000000
#define CONFIG_SYS_MC_ASR_VAL 0x00000000
#define CONFIG_SYS_MC_AASR_VAL 0x00000000
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
/* clocks */
#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
/* sdram */
#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
#else
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
#define CONFIG_BAUDRATE 115200
/*
* Hardware drivers
*/
/* define one of these to choose the DBGU, USART0 or USART1 as console */
#define CONFIG_DBGU
#undef CONFIG_USART0
#undef CONFIG_USART1
#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
#define CONFIG_BOOTDELAY 3
/* #define CONFIG_ENV_OVERWRITE 1 */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_NAND_LEGACY
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
#define ADDR_COLUMN 1
#define ADDR_PAGE 2
#define ADDR_COLUMN_PAGE 3
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
/* the following are NOP's in our implementation */
#define NAND_CTL_CLRALE(nandptr)
#define NAND_CTL_SETALE(nandptr)
#define NAND_CTL_CLRCLE(nandptr)
#define NAND_CTL_SETCLE(nandptr)
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
#define CONFIG_DRIVER_ETHER
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_AT91C_USE_RMII
/* AC Characteristics */
/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
#define DATAFLASH_TCSS (0xC << 16)
#define DATAFLASH_TCHS (0x1 << 24)
#define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
#define PHYS_FLASH_1 0x10000000
#define PHYS_FLASH_SIZE 0x200000 /* 2 megs main flash */
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 256
#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
#undef CONFIG_ENV_IS_IN_DATAFLASH
#ifdef CONFIG_ENV_IS_IN_DATAFLASH
#define CONFIG_ENV_OFFSET 0x20000
#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
#else
#define CONFIG_ENV_IS_IN_FLASH 1
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
#else
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
#endif /* CONFIG_ENV_IS_IN_DATAFLASH */
#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
#define CONFIG_SYS_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
#else
#define CONFIG_SYS_BOOT_SIZE 0x00 /* 0 KBytes */
#define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1
#define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 }
#define CONFIG_SYS_PROMPT "U-Boot> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
/* AT91C_TC_TIMER_DIV1_CLOCK */
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
#ifdef CONFIG_USE_IRQ
#error CONFIG_USE_IRQ not supported
#endif
#endif
target remote localhost:2001
# Try to run at 1khz... Yea, that slow!
# Chip is really running @ 32khz
monitor jtag_khz 8
monitor mww 0xfffffc64 0xffffffff
## disable all clocks but system clock
monitor mww 0xfffffc04 0xfffffffe
## disable all clocks to pioa and piob
monitor mww 0xfffffc14 0xffffffc3
## master clock = slow cpu = slow
## (means the CPU is running at 32khz!)
monitor mww 0xfffffc30 0
## main osc enable
monitor mww 0xfffffc20 0x0000ff01
## program pllA
monitor mww 0xfffffc28 0x20263e04
## program pllB
monitor mww 0xfffffc2c 0x10483e0e
## let pll settle... sleep 100msec
monitor sleep 100
## switch to fast clock
monitor mww 0xfffffc30 0x202
## Sleep some - (go read)
monitor sleep 100
#========================================
# CPU now runs at 180mhz
# SYS runs at 60mhz.
monitor jtag_khz 40000
#========================================
## set memc for all memories
monitor mww 0xffffff60 0x02
## program smc controller
monitor mww 0xffffff70 0x3284
## init sdram
monitor mww 0xffffff98 0x7fffffd0
## all banks precharge
monitor mww 0xffffff80 0x02
## touch sdram chip to make it work
monitor mww 0x20000000 0
## sdram controller mode register
monitor mww 0xffffff90 0x04
monitor mww 0x20000000 0
monitor mww 0x20000000 0
monitor mww 0x20000000 0
monitor mww 0x20000000 0
monitor mww 0x20000000 0
monitor mww 0x20000000 0
monitor mww 0x20000000 0
monitor mww 0x20000000 0
## sdram controller mode register
## Refresh, etc....
monitor mww 0xffffff90 0x03
monitor mww 0x20000080 0
monitor mww 0xffffff94 0x1f4
monitor mww 0x20000080 0
monitor mww 0xffffff90 0x10
monitor mww 0x20000000 0
monitor mww 0xffffff00 0x01
set line /dev/ttyS0 set speed 115200 set carrier-watch off set handshake none set flow-control none robust set file type bin set file name lit set rec pack 1000 set send pack 1000 set window 5
kermit -c u-boot:>loadb 0x21000000 (ctrl+\) + C kermit:>send u-boot.bin kermit:>connect
echo {filesize}
protect off bank 1
erase 0x100000000 0x10003FFF
cp.b 0x21000000 0x10000000 {filesize}
protect on bank 1
setenv ethaddr 13:14:15:16:17:18 setenv ipaddr 172.16.1.213 setenv serverip 172.16.1.13 saveenv tftp 0x21000000 u-boot.bin
make menuconfig ARCH=arm make ARCH=arm uImage CROSS_COMPILE=arm-linux- -j4
cp ~/linux-2.6.29/arch/arm/boot/uImage /srv/tftp/uImage-at91 u-boot:>tftp 0x21000000 uImage-at91 u-boot:>iminfo 0x21000000 u-boot:>bootm
sudo apt-get install uboot-mkimage mkimage -A arm -O linux -T ramdisk -a 0x21000000 -e 0x21000000 -n "Test1" -d rootfs.arm.cpio uInit1 cp uInit1 /srv/tftp u-boot:>tftp 0x20d00000 uImage-at91 u-boot:>tftp 0x20b00000 uInit1 u-boot:>bootm 0x20d00000 0x20b00000
cd ~/xenomai/xenomai-2.4.92/scrips
./prepare-kernel.sh --linux=/home/dornho/xenomai/linux-2.6.29.6-2/ --adeos=../ksrc/arch/arm/patches/adeos-ipipe-2.6.29-arm-1.13-03.patch --arch=arm
cd ~/xenomai/linux-2.6.29.6
make ARCH=arm uImage CROSS_COMPILE=arm-linux- -j4
cp ~/xenomai/linux-2.6.29.6/arch/arm/boot/uImage /srv/tftp/uX1
----uboot -----
U-Boot 2009.03 (Mär 24 2009 - 09:27:49)
DRAM: 32 MB
Atmel: AT49BV1614A (16Mbit)
Flash: 2 MB
NAND: 64 MB
DataFlash:AT45DB642
Nb pages: 8192
Page Size: 1056
Size= 8650752 bytes
Logical address: 0xC0000000
Area 0: C0000000 to C00041FF (RO) Bootstrap
Area 1: C0004200 to C00083FF Environment
Area 2: C0008400 to C0041FFF (RO) U-Boot
Area 3: C0042000 to C0251FFF Kernel
Area 4: C0252000 to C083FFFF FS
In: serial
Out: serial
Err: serial
U-Boot> tftp 20d00000 uX1
TFTP from server 172.16.1.13; our IP address is 172.16.1.213
Filename 'uX1'.
Load address: 0x20d00000
Loading: T #################################################################
#################################################################
#################################################################
#################################################################
#################################################################
#################################################################
#################################################################
#########################
done
Bytes transferred = 2455064 (257618 hex)
U-Boot> tftp 20b00000 uInit1
TFTP from server 172.16.1.13; our IP address is 172.16.1.213
Filename 'uInit1'.
Load address: 0x20b00000
Loading: #################################################################
#################################################################
#################################################################
##############################################################
done
Bytes transferred = 1314880 (141040 hex)
U-Boot> boot 20d00000 20b00000
Usage:
boot - boot default, i.e., run 'bootcmd'
U-Boot> bootm 20d00000 20b00000
## Booting kernel from Legacy Image at 20d00000 ...
Image Name: Linux-2.6.29.6
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 2455000 Bytes = 2.3 MB
Load Address: 20008000
Entry Point: 20008000
Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 20b00000 ...
Image Name: Test1
Image Type: ARM Linux RAMDisk Image (gzip compressed)
Data Size: 1314816 Bytes = 1.3 MB
Load Address: 21000000
Entry Point: 21000000
Verifying Checksum ... OK
Loading Kernel Image ... OK
OK
Starting kernel ...
Uncompressing Linux.............................................................
[ 0.000000] Initializing cgroup subsys cpu
[ 0.000000] Linux version 2.6.29.6 (dornho@dornho-dev2) (gcc version 4.3.3 (9
[ 0.000000] CPU: ARM920T [41129200] revision 0 (ARMv4T), cr=c0007177
[ 0.000000] CPU: VIVT data cache, VIVT instruction cache
[ 0.000000] Machine: Atmel AT91RM9200-DK
[ 0.000000] Memory policy: ECC disabled, Data cache writeback
[ 0.000000] Clocks: CPU 179 MHz, master 59 MHz, main 18.432 MHz
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pa8
[ 0.000000] Kernel command line: console=ttyS0,115200 root=/dev/ram
[ 0.000000] AT91: 128 gpio irqs in 4 banks
[ 0.000000] PID hash table entries: 128 (order: 7, 512 bytes)
[ 0.000000] AT91 I-pipe timer: div: 32, freq: 1.872000 MHz, wrap: 35.008547 s
[33554132.000000] I-pipe 1.13-03: pipeline enabled.
[33554132.007812] Console: colour dummy device 80x30
[33554132.007812] console [ttyS0] enabled
[33554132.015625] Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
[33554132.023437] Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
[33554132.031250] allocated 163840 bytes of page_cgroup
[33554132.039062] please try cgroup_disable=memory option if you don't want
[33554132.054687] Memory: 32MB = 32MB total
[33554132.054687] Memory: 25240KB available (4600K code, 1018K data, 136K init)
[33554132.062500] SLUB: Genslabs=12, HWalign=32, Order=0-3, MinObjects=0, CPUs=1
[33554132.070312] Calibrating delay loop... 89.53 BogoMIPS (lpj=349184)
[33554132.242187] Security Framework initialized
[33554132.242187] SELinux: Disabled at boot.
[33554132.250000] Mount-cache hash table entries: 512
[33554132.257812] Initializing cgroup subsys ns
[33554132.265625] Initializing cgroup subsys cpuacct
[33554132.265625] Initializing cgroup subsys memory
[33554132.273437] CPU: Testing write buffer coherency: ok
[33554132.312500] net_namespace: 1012 bytes
[33554132.320312] NET: Registered protocol family 16
[33554132.367187] AT91: Power Management
[33554132.593750] bio: create slab at 0
[33554132.648437] NET: Registered protocol family 8
[33554132.656250] NET: Registered protocol family 20
[33554132.664062] NetLabel: Initializing
[33554132.671875] NetLabel: domain hash size = 128
[33554132.671875] NetLabel: protocols = UNLABELED CIPSOv4
[33554132.679687] NetLabel: unlabeled traffic allowed by default
[33554132.726562] NET: Registered protocol family 2
[33554132.734375] IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
[33554132.750000] TCP established hash table entries: 1024 (order: 1, 8192 byte)
[33554132.757812] TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
[33554132.765625] TCP: Hash tables configured (established 1024 bind 1024)
[33554132.773437] TCP reno registered
[33554132.773437] NET: Registered protocol family 1
[33554132.789062] checking if image is initramfs... it is
[33554133.335937] Freeing initrd memory: 1284K
[33554133.343750] NetWinder Floating Point Emulator V0.97 (extended precision)
[33554133.375000] audit: initializing netlink socket (disabled)
[33554133.382812] type=2000 audit(1.386:1): initialized
[33554133.460937] Xenomai: scheduling class idle registered.
[33554133.468750] Xenomai: scheduling class rt registered.
[33554133.476562] Xenomai: scheduling class pss registered.
[33554133.476562] Xenomai: scheduling class tp registered.
[33554133.484375] I-pipe: Domain Xenomai registered.
[33554133.492187] Xenomai: hal/arm started.
[33554133.625000] Xenomai: real-time nucleus v2.5-rc3 (Flying In A Blue Dream) .
[33554133.632812] Xenomai: debug mode enabled.
[33554133.671875] Xenomai: starting native API services.
[33554133.671875] Xenomai: starting POSIX services.
[33554133.679687] Xenomai: starting RTDM services.
[33554133.687500] Xenomai: registered exported object RN#0 (regions)
[33554133.695312] Xenomai: starting pSOS+ services.
[33554133.703125] Xenomai: registered exported object heap0 (heaps)
[33554133.710937] Xenomai: starting VRTX services.
[33554133.710937] Xenomai: starting VxWorks services.
[33554133.718750] Xenomai: starting uITRON services.
[33554133.726562] Xenomai: starting RTAI emulator.
[33554134.046875] VFS: Disk quotas dquot_6.5.2
[33554134.054687] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[33554134.117187] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[33554134.132812] JFFS2 version 2.2. (NAND) �© 2001-2006 Red Hat, Inc.
[33554134.203125] GFS2 (built Oct 2 2009 14:41:57) installed
[33554134.210937] msgmni has been set to 51
[33554134.226562] alg: No test for stdrng (krng)
[33554134.234375] io scheduler noop registered
[33554134.242187] io scheduler anticipatory registered
[33554134.242187] io scheduler deadline registered
[33554134.257812] io scheduler cfq registered (default)
[33554138.234375] atmel_usart.0: ttyS0 at MMIO 0xfefff200 (irq = 1) is a ATMEL_L
[33554138.250000] atmel_usart.1: ttyS1 at MMIO 0xfffc4000 (irq = 7) is a ATMEL_L
[33554138.460937] brd: module loaded
[33554138.476562] SSFDC read-only Flash Translation layer
[33554138.492187] mice: PS/2 mouse device common for all mice
[33554138.515625] cpuidle: using governor ladder
[33554138.523437] cpuidle: using governor menu
[33554138.531250] sdhci: Secure Digital Host Controller Interface driver
[33554138.539062] sdhci: Copyright(c) Pierre Ossman
[33554138.546875] at91_mci at91_mci: 4 wire bus mode not supported - using 1 wie
[33554138.578125] RT-Socket-CAN 0.90.2 - (C) 2006 RT-Socket-CAN Development Team
[33554138.585937] rtcan: registered rtcan0
[33554138.593750] rtcan0: VIRT driver loaded
[33554138.601562] rtcan: registered rtcan1
[33554138.601562] rtcan1: VIRT driver loaded
[33554138.625000] TCP cubic registered
[33554138.648437] registered taskstats version 1
[33554138.656250] drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
[33554138.664062] Freeing init memory: 136K
Initializing random number generator... done.
Starting network...
ip: RTNETLINK answers: File exists
Welcome to Buildroot
uclibc login: root
# ls
# cd /usr/bin/
# ls
[ deallocvt hexdump mkfifo sha1sum unzip
[[ diff hostid nohup sort uptime
ar dirname id nslookup strings uudecode
arping dos2unix install od tail uuencode
awk du ipcrm openvt tee vlock
basename dumpleases ipcs passwd telnet wc
bunzip2 eject killall patch test wget
bzcat env killall5 printf tftp which
chrt ether-wake last readlink time who
chvt expr length realpath top whoami
cksum fdformat less renice tr xargs
clear find logger reset traceroute yes
cmp fold logname resize tty
crontab free lzmacat seq uniq
cut fuser md5sum setkeycodes unix2dos
dc head mesg setsid unlzma
# uptime
17:01:12 up 1 min, load average: 0.05, 0.02, 0.00
# test
# ifconfig
lo Link encap:Local Loopback
inet addr:127.0.0.1 Mask:255.0.0.0
UP LOOPBACK RUNNING MTU:16436 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:0
RX bytes:0 (0.0 B) TX bytes:0 (0.0 B)
# free
total used free shared buffers
Mem: 26660 8520 18140 0 0
Swap: 0 0 0
Total: 26660 8520 18140
# du
0 .
# df
Filesystem Size Used Available Use% Mounted on
tmpfs 13.0M 0 13.0M 0% /tmp
#
# cat /proc/xenomai/sched
CPU PID CLASS PRI TIMEOUT TIMEBASE STAT NAME
0 0 idle -1 - master R ROOT
# cat /proc/xenomai/
/proc/xenomai/acct /proc/xenomai/rtdm/
/proc/xenomai/apc /proc/xenomai/sched
/proc/xenomai/faults /proc/xenomai/schedclasses/
/proc/xenomai/hal /proc/xenomai/stat
/proc/xenomai/heap /proc/xenomai/timebases
/proc/xenomai/interfaces/ /proc/xenomai/timer
/proc/xenomai/irq /proc/xenomai/timerstat/
/proc/xenomai/latency /proc/xenomai/version
/proc/xenomai/registry/
# cat /proc/xenomai/stat
CPU PID MSW CSW PF STAT %CPU NAME
0 0 0 0 0 00200080 91.9 ROOT
0 0 0 696591 0 00000000 7.9 IRQ17: [timer]
# cat /proc/xenomai/latency
9615
#
Markus Dornhofer Rudolf-Burgstaller Gasse 5/5 8600 Bruck an der Mur AUSTRIA
mail: markus.dornhofer@gmx.net